Silicene Roadmaps

The semiconductor electronics industry has been on a path of ever-increasing miniaturization since the introduction of the solid-state transistor. This has led to devices such as the iPad, which hold more computing power than the first room-sized computers, and are far cheaper and more reliable.

Such progress has been quantified by the so-called ‘Moore’s Law’ (named after Gordon Moore, co-founder of Intel), which basically says that the number of components on a chip doubles every 1.5-2 years. One major driver of the miniaturization has been the reduction in the size of the so-called channel length of transistors. It is clearly understood that the smallest length possible would be for a single atomic layer thick of silicon. Current lengths are at around 10nm.

Silicene MBA Roadmap

The International Technology Roadmap for Semiconductors (ITRS) was created in 1999, with the objective `to present industry-wide consensus on the “best current estimate” of the industry’s research and development needs out to a 15-year horizon.’

Since 2007, the ITRS has also looked at novel concepts for going beyond the Moore scaling, the so-called “More than Moore” (MtM) effort. Graphene and Silicene would represent such concepts because they are the ultimate scale - a single atomic layer.

Silicene PhD Roadmap

What’s truly noteworthy is that these two-dimensional (2D) materials have properties drastically different from what would be expected by following the down scaling of the three-dimensional solid such as silicon.’

The roadmaps for graphene and silicene are, therefore, different in nature from the ITRS. Instead of predicting the pace of down scaling, they provide predictions of what kind of functionalities and devices one might expec t at some future time.

A roadmap for graphene has recently been published by K. Novoselov et al. [Nature 490, 192 (2012)].

Graphene Overview (Published Papers)
  • First band structure:
    P.R Wallace, Phys. Rev.71, 622 (1947)
  • First use of "graphene":
    di Vittorio et al., PRB 43, 1313 (1991)
  • First identified:
    Novoselov et al., Science 306, 666 (2004)
  • Web of Science (2010): graphene > 8000papers
  • 2004-12: > 20,000
Silicene Overview (Published Papers)
  • First band structure:
    Takeda & Shiraishi, Phys. Rev 71, 14916 (1994)
  • First use of "silicene":
    Guzmán-Verri and Lew Yan Voon, PRB 76, 075131 (2007)
  • First identified:
    Vogt et al., Phys. Rev Lett. 108, 155501 (2012)
  • Web of science:
    (1994-2012): > 98 papers
Graphene vs. Silicene
Comparison Chart
Graphene
Silicene
First Studied
1947 1994
First Named
1991 2007
First Identified
2004 2012
Two-Dimensional
Yes Yes
Dirac Cone
Yes Yes
Electron Speed (free-standing)
˜105 m/s ˜105 m/s
Band Gap:
Free Standing 1947 1994
In Electric Field No Yes
On Substrate Maybe Yes
Bilayer No Yes
Mechanical Properties
In-Plane Stiffness 335 62
Poisson Ratio 0.16 0.30
Thermal Conductivity
˜3000-5000 W/mK ˜20 W/mK

Silicene Roadmap

A) Fabrication:

The production cost is the cost for
industrial-scale production.

Graphene was first isolated in 2004 by Novoselov and coworkers using mechanical exfoliation, or more commonly known as the scotch tape method. A piece of scotch tape was used to peel off single layers of graphene off of pencil lead (graphite). This work, and the subsequent characterization of graphene (i.e., verification of properties), led to Geim and Novoselov receiving the Nobel Prize for Physics in 2010.

The same year, the group of W. A. de Heer produced epitaxial graphene on insulating silicon carbide (SiC) by thermal decomposition of the SiC at high temperature either in vacuum or in argon.

The mechanical exfoliation method produces high-quality graphene for research but cannot be scaled up for industrial production. However, growth of graphene on SiC can lead to industrial scale production for electronics applications.

Two additional noteworthy fabrication methods include the surface graphitization on metals by chemical vapor deposition (possibly first achieved in 1967!), and chemical exfoliation (i.e., the separation of the graphene sheets by chemical means) from graphite powders.

Growth on metals will require transfer to an insulating substrate for electronics applications. Chemical exfoliation tends to produce “dirty” samples though the process is typically low cost.

Production Cost

Quality

An early form of silicene was probably first synthesized in 2006 by chemical exfoliation of calcium disilicide though the resulting silicon nanosheets were chemically functionalized (i.e., not pure but had other atoms attached to the silicon atoms) and were likely not oriented as required to form silicene.

In late 2009, there were reports of thin ribbons of silicene formed on silver substrates by the thermal decomposition of silicon wafers in ultra-high vacuum (UHV). Similar growth conditions on differently-oriented silver finally led to silicene sheets in 2012.

Growth by surface segregation following the deposition of a conductive ceramic zirconium diboride on a silicon substrate has also been reported.

In 2013, we have the report of the growth of silicene on iridium.

There are some current efforts at growing silicene on graphene (S on G) and it is projected that this will be achieved in 2014.

Graphene

B) Electronics:

The primary reason why graphene is attractive for making transistors is that the electron mobility could reach as high as 200,000 cm2/(Vs), whereas it is only ~1000 cm2/(Vs) for bulk silicon used in chips at room temperature.

This translates into much faster operating transistors and high-frequency operation. These have been demonstrated in the lab by IBM and others.

Silicene is predicted to have a mobility almost as large as for graphene. Hence, high-frequency silicene transistors are also expected.

The current graphene roadmap anticipates that a high-frequency graphene transistor might be commercialized during 2020-5. The reason for the 10-year delay is because the industrial production of graphene has not yet started and would be cost-prohibitive using current scientific knowledge.

Conversely, even though silicene was first made 8 years after graphene, it is anticipated that the first commercial high-frequency silicene transistor will precede graphene transistors by 1-2 years.

Given that the silicon industry is already existent, silicene is also expected to be the cheaper technology (versus Graphene).

The development of logic transistors is more heavily leaned towards silicene, since it has already been shown that silicene has an inherent advantage over graphene for the development of such: the ability to have a so-called band gap.

C) Players, Breakthroughs, Industries:

IBM has revealed that graphene can't yet fully replace silicon inside CPUs, as a graphene transistor can't actually be completely switched off. In an interview for a forthcoming Custom PC feature about chip-building materials, Yu-Ming Lin from IBM Research - Nanometer Scale Science and Technology told us that 'graphene as it is will not replace the role of silicon in the digital computing regime.'

Graphene
2010-12
2013-15
2015-18
2018-23
2023-28
Growth of silicene on metals (R&D)
Players: universities
Funding: Chinese government, European Union-Frontiers
in Emerging Technology program, Japanese government
Growth of silicene-graphene heterostructures (R&D)
Players: universities
US funding: AFOSR and NSF (anticipated)
Growth of silicicene on insulators (R&D)
Players: universities; industry such as IBM, Intel
Development of silicene technology
e.g., silicene gas sensors
Commercialization of silicene transistors
Players: industry such as IBM, Intel, TI
Silicene electronics industry
Disruptive industry: desktop supercomputers;
ultramobile computing (e.g., PC in cars, clothing, ...)
Silicene Milestones
About:

Launched in March 2013, Silicene.com is a thought leadership portal that’s solely focused on two-dimensional (2D) materials. Silicene.com will become the online marketplace of this space – a must-read for academics and institutional investors with an interest in the space. We’ll cover and explore everything related to Silicene – and plenty related to Graphene.

Silicene Labs, LLC (parent of Silicene.com) is headed by a team that’s composed of world renowned physicists, IP attorneys, business professionals, and creatives. We are currently creating an Advisory Board, which we expect to complete by summer 2013.

Our site content includes key reference data, breaking news, relevant videos, and proprietary insights and analysis from Dr. Lok C. Lew Yan Voon – the Father of Silicene. And it’s all presented on our gorgeous, state-of-the-art, Silicene.com site.

Silicene.com also offers definitive, Silicene Roadmaps for academics, institutional investors, hedge funds and the general public.

Silicene Labs, LLC is currently accepting a limited number of short-to-intermediate term consulting engagements. In addition, Dr. Lok C. Lew Yan Voon is occasionally available to speak at important industry events. Please contact us at Consultancy@Silicene.com for more information.

Silicene has been included in Europe’s Graphene Flagship program, for which over €1bn in funding has already been committed.

Biographies:

Dr. Lok C. Lew Yan Voon is a world-renowned, solid state physicist, who has published 96 peer-reviewed papers, and is the recipient of numerous awards, including the National Science Foundation’s prestigious CAREER award. Together with his student, Gian Guzmán-Verri, he was the first to prove that silicene has the same unique properties as graphene; and, in fact, Dr. Lok coined the term ‘silicene.’ Dr. Lok currently serves as the Dean of the School of Science and Mathematics at The Citadel in Charleston, SC.

Edmund J. Ferdinand, III is a leading authority in the fields of intellectual property and licensing. He has handled some of the most successful licensing and merchandising programs of the past decade for celebrities and other famous brands that have resulted in billions of dollars of retail sales worldwide. He has a long history of assisting clients with the acquisition and sale of intellectual property assets, including domain names.

Jed has written and lectured extensively on a wide variety of intellectual property and licensing topics. He has been a moderator and featured speaker at numerous conferences and trade shows for many years, including the annual Licensing Show in Las Vegas. He has also served as a member of the faculty of LIMA’s Certificate of Licensing Studies Program for licensing professionals.

Jed has served as member of the Advisory Board of leading publications in the intellectual property field – The Licensing Journal and IP Litigator. He is a monthly columnist for the publication, License India, and has been a contributor to West’s Corporate Counsel Newsletter and to LIMA's Bottomline publication.